I have a problem getting a makefile to work. I have several parsers that compile XML schemas as follows:
$(srcdir)/schema_1_parser.cpp: \
$(srcdir)/schema_1_parser.l \
$(srcdir)/schema_1_parser.tab.cpp
$(LEX) -Pschema_1 -o$(srcdir)/schema_1_parser.cpp \
$(srcdir)/schema_1_parser.l
$(srcdir)/schema_1_parser.tab.cpp $(srcdir)/schema_1_parser.tab.hpp: \
$(srcdir)/schema_1_parser.y
$(YACC) -ldv -p schema_1 -o $(srcdir)/schema_1_parser.tab.cpp \
$(srcdir)/schema_1_parser.y
(There are multiple such rule pairs.)
I added the second target $(srcdir)/schema_1_parser.tab.hpp
because of a makefile error "Do not know how to make schema_1_parser.tab.hpp", even though the header gets generated automatically together with the .tab.cpp file.
Now the bison parser is being called twice. I read up on this and am given to believe that this is expected behavior for special rules with multiple targets, and that I should use pattern rules instead. However, I am a bit unsure what about the command line options -Pschema_1
for flex and -p schema_1
for bison. Can I use the pattern to take care of those also? (My experience has been negative, but I may be missing something else.)
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