jeudi 12 novembre 2020

Question 1 Produce a Verilog module for a 24-bit adder. The inputs to the module are a, b, and cin, and the outputs are sum, and carry [closed]

Produce a Verilog module for a 24-bit adder. The inputs to the module are a, b, and cin, and the outputs are sum, and carry.

Within your module you must use continuous assignments (using "assign" ) - use a single assign statement is possible.

Aucun commentaire:

Enregistrer un commentaire